1. Field of the Invention
The invention relates to the use of error correction codes for flash memory devices. More particularly, the invention relates to the generation of soft decision information for error correction codes for flash memory devices.
2. Description of the Related Art
With aggressive process scaling, raw bit error rate (BER) of NAND flash memory device is becoming relatively poorer and poorer. To maintain the same level of reliability, solid state device (SSD) controllers are adopting soft decision information, e.g., soft decoded error correction codes (ECC), such as low density parity check (LDPC) codes, for purposes of error correction. These soft decoded error correction codes are more powerful in correcting errors, however, soft decoded error correction codes typically require that the input to the error correction decoder be soft decision information of flash channels. Such soft decision information typically is in the form of a log likelihood ratio (LLR).
Because conventional flash memory devices do not provide soft decision information, SSD controllers have to generate soft decision information using either hardware or software. Some recent flash memory devices have started to provide some sort of soft decision information, but the typical soft decision information being provided often does not meet the acceptable quality standards. Also, conventionally, producing relatively high quality soft decision information from NAND flash memory devices typically is not a cost effective option. Therefore, it remains the task of SSD controllers to produce soft decision information for error correction codes.